LEARNING OUTCOMES
Student gets acquainted with the history of digital microelectronics, elementary building blocks (logic gates), and is familiar with the electrical functionality of the gates and the most important electrical relationships affecting the functionality. Student is familiar with the most common methods for power consumption and delay optimization. He also knows the most common arithmetic building blocks, understand their functionality, and is familiar with the optimization methods used for adders and multipliers. Student is familiarized with the commonly used power/speed trade-off methods on algorithmic level, and is familiar with the commonly used advanced algorithms, and understand what the algorithm optimization is based on.
Credits: 5
Schedule: 07.01.2025 - 20.02.2025
Teacher in charge (valid for whole curriculum period):
Teacher in charge (applies in this implementation): Marko Kosunen, Kari Stadius
Contact information for the course (applies in this implementation):
CEFR level (valid for whole curriculum period):
Language of instruction and studies (applies in this implementation):
Teaching language: English. Languages of study attainment: English
CONTENT, ASSESSMENT AND WORKLOAD
Content
valid for whole curriculum period:
Introduction (history of digital microelectronics), Inverter, Logic, Synchronization circuits, Bit transfer and signaling, elementary arithmetic building blocks, algorithm level optimization methods.
Assessment Methods and Criteria
valid for whole curriculum period:
Exercises, Presentation, design project, Exam. 50% of exam points are required to qualify.
Workload
valid for whole curriculum period:
Lecture: Introduction to theory and motivation.
Exercises: Mathematical handling of the topic and design methods.
Presentation and listening the presentations of the others.
Design project
Exam
Independent work
DETAILS
Study Material
valid for whole curriculum period:
Lecture slides
Rabaey, Chandrakasan, Nikolic, "Digital Integrated Circuits- A design perspective", Prentice Hall 2003.
Parhi, "VLSI Digital Signal Processing Systems-design and implementation", Wiley 1999.
Substitutes for Courses
valid for whole curriculum period:
Prerequisites
valid for whole curriculum period:
FURTHER INFORMATION
Further Information
valid for whole curriculum period:
Teaching Language: English
Teaching Period: 2024-2025 Spring III
2025-2026 Spring III