LEARNING OUTCOMES
Is familiar with the VHDL-hardware description language and the digital design implementation flow (synthesis tools) from VHDL to layout. Is familiar with the functionality of microcontrollers and basics of programming with assembly language.
Credits: 5
Schedule: 28.02.2022 - 30.05.2022
Teacher in charge (valid for whole curriculum period):
Teacher in charge (applies in this implementation): Marko Kosunen, Kari Stadius
Contact information for the course (applies in this implementation):
CEFR level (valid for whole curriculum period):
Language of instruction and studies (applies in this implementation):
Teaching language: English. Languages of study attainment: English
CONTENT, ASSESSMENT AND WORKLOAD
Content
valid for whole curriculum period:
Six coding exercises that teach the elementary structures of VHDL and simulation methods. Self -guided design project about VHDL description of a microcontroller and its synthesis to layout with digital synthesis and place-and-route-tools.
Assessment Methods and Criteria
valid for whole curriculum period:
Passed VHDL-coding exercises and study diary of the design project.
Workload
valid for whole curriculum period:
Introductory lectures (2h, 2 times)
VHDL-coding exercises (2h, 6 times)
Microcontroller implementation with VHDL as self-paced project 110h. Possibility for guidance in weekly exercise hours (2h per week).
DETAILS
Study Material
valid for whole curriculum period:
Handouts, P. Ashenden, "Designers guide to VHDL", Third edition, Elsevier, 2008.
Substitutes for Courses
valid for whole curriculum period:
Prerequisites
valid for whole curriculum period:
FURTHER INFORMATION
Further Information
valid for whole curriculum period:
Teaching Period:
2020-2021 Spring IV-V
2021-2022 No teaching
Course Homepage: https://mycourses.aalto.fi/course/search.php?search=ELEC-E3540
Registration for Courses: In the academic year 2021-2022, registration for courses will take place on Sisu (sisu.aalto.fi) instead of WebOodi.
WebOodi