This semester the things will be different
The topic of the semester is "Constructing programmatic circuit build flow for Cadence 045 generic PDK"
Objective is to create a chip-build flow and design environment with all the gimmics so that we can later on put up a course called "Tape-out course"
This course is very directed for persons who are already familiar with programmatic circuit design methodologies and Git version control, and are familiar with the basic chip flow. If yo are not, and you are affiliated with the ECD-group, you still have an opportunity to practice that before the course starts.
A pair of students are assigned a task, E.g. 'implement IO macros if needed and the padring template". We will meet weekly, and as the course progress, we will merge the subtasks of the student groups to the flow so that eventually we can run the template flow with a.) digital part b.) Analog part and c. Padring with configure && make so that the flow sends an announcement to the course slack-channel. The analog part can contain some simple macros that actually do something, in order to test the simulator interface.
Grading: Pass/Fail (you need to fulfill your part with documentation and a slideset, and execute the flow once)
Credits: 5 , (8 would be too much)
If you are not fluent with git and the chpflows, but you are still willing to participate, or you definitely need the credits, you will be assigned to 'test- group' . I.e. your task will be to test the flow with a given design task, not to develop it. However, the course may turn out to be hard.
If you have ideas for improvement, let me know.
Due to the fact that Electronics II lecture is between 12-14, the first meetings for this course are
Wed. 28.2 14.15-16, AS5
Wed. 6.3 14.15-16, AS5
Wed. 13.3 14.15-16, AS5