ELEC-E3510 - Basics of IC Design, Lecture, 10.1.2023-17.2.2023
This course space end date is set to 17.02.2023 Search Courses: ELEC-E3510
CAD 1d: Amplifier analysis
In exercise CAD 1, four different amplifiers are simulated in a generic 45-nm CMOS process using Virtuoso and Eldo. Exercises CAD 1a-c introduce the student to schematic drawing and performing a basic AC simulation. In exercise CAD 1d, a more extensive set of different simulations is performed for a more complicated amplifier. The simulation command files created during exercise CAD 1d will be utilized in exercise CAD 2.
Exercises CAD 1a-d are graded pass/fail (yes/no, respectively). The submission deadline for CAD 1a-d is 07.2.2022 at 10 am. However, it is strongly recommended that students make their first submissions well in advance to receive feedback and revise their submissions.
Round your answers to 4 significant digits. Use unit prefixes (mV, MHz...) instead of the scientific notation (x 10-3 V, x 106 Hz...). The submission type is text or pdf!
Approximate features of the amplifier:
DC Gain ≈ 40 dB
Minimum noise density ≈ -150 dB/Hz
DC output voltage after step input ≈ 850 mV
2nd harmonic components of ≈ -60 dB and ≈ -40dB for the small and large input signal amplitude, respectively.
PSRR(VDD) ≈ 60 dB, PSRR(VSS) ≈ 45 dB
Maximum UGF ≈ 350 MHz
Maximum settling time ≈ 2.1 ns
- 19 December 2022, 10:09 AM